1. Field of the Invention
The present invention relates to the field of digital computer systems, and more particularly, to the direct memory access control of devices located on a bus.
2. Description of Related Art
In computer systems, electronic chips and other components are connected with one another by buses. A variety of components can be connected to the bus, providing intercommunication between all of the devices that are connected to the bus. One type of bus which has gained wide industry acceptance is the industry standard architecture (ISA) bus. The ISA bus has twenty-four (24) memory address lines which therefore provides support for up to sixteen (16) megabytes of memory. The wide acceptance of the ISA bus has resulted in a very large percentage of devices being designed for use on the ISA bus. However, high input devices commonly used in computer systems require faster buses. A solution to the general problem of sending and receiving data from the processor to any high input device is a local bus. Unlike the ISA bus, which operates relatively slowly with limited bandwidth, a local bus communicates at system speed and carries data in 32-bit blocks. Local bus machines remove from the main system bus those interfaces that need quick response, such as memory, display, and disk drives. One such local bus that is gaining acceptance in the industry is the peripheral component interconnect (PCI) bus. The PCI bus can be a 32 or 64-bit pathway for high-speed data transfer. Essentially, the PCI bus is a parallel data path provided in addition to an ISA bus. The system processor and memory can be attached directly to the PCI bus, for example. Other devices such as graphic display adapters, disk controllers, sound cards, etc. can also attach directly or indirectly (e.g., through a host bridge) to the PCI bus.
A bridge chip is provided between the PCI bus and the ISA bus in order to provide communication between devices on the two buses. The bridge chip essentially translates the ISA bus cycles to PCI bus cycles, and vice versa.
Many of the devices attached to the PCI bus and the ISA bus are master devices that can conduct processing independently of the bus or other devices. Certain devices coupled to the buses are considered to be slaves or targets that accept commands and respond to requests of a master. The PCI bus has an addressing capability of 32 bits to provide for 4 gigabytes of memory access. A master on the ISA bus can access a memory location in the memory on the PCI bus, although normally only within the lowest 16 megabyte region due to the 24-bit addressing of the ISA bus masters.
In a digital computer, a microprocessor operates on data stored in a main memory. Since there are practical size limitations on the main memory, bulk memory storage devices are provided in addition to and separately from the main memory. When the microprocessor wants to make use of data stored in bulk storage, for example, a hard disk, the data is moved from the hard disk into the main memory. This movement of blocks of memory inside the computer is a very time consuming process and would severely hamper the performance of the computer system if the microprocessor were to control the memory transfers itself.
In order to relieve the microprocessor from the chore of controlling the movement of blocks of memory inside the computer, a direct memory access (DMA) controller is normally used. The DMA controller receives information from the microprocessor as to the base location from where bytes are to be moved, the address to where these bytes should go, and the number of bytes to move. Once it has been programmed by the microprocessor, the DMA controller oversees the transfer of the memory data within the computer system. Normally, DMA operations are used to move data between input/output (I/O) devices and memory.
It is desirable to provide a system with another bus in addition to a PCI bus and an ISA bus. For example, this additional expansion bus can be a Microchannel (a trademark of IBM) bus. A Microchannel bus has improved performance characteristics with respect to the ISA bus, and certain devices have been designed to take advantage of the Microchannel architecture.
Providing a system already equipped with a PCI bus and an ISA bus with a Microchannel bus (or other expansion bus) provides the advantages of: (1) the extremely high performance of the PCI bus; (2) the very large selection of ISA compatible devices; and (3) backward compatibility with devices in which a system user has invested that are designed especially for a specific expansion bus. A problem exists, however, in the DMA control of devices in the system since a DMA control circuit in a PCI/ISA bridge is not compatible with Microchannel (or any other expansion bus) architecture. Simply adding another DMA control circuit to the system to provide DMA control of the devices coupled to the expansion bus presents a problem in that the first and second DMA control circuits in the system could decode the same I/O addresses, leading to system error.